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DS21458DK, Quad T1/E1/J1 Transceiver Design Kit Daughter Card
ADDRESS MAP
DK101 daughter card address space begins at 0x81000000
DK2000 daughter card address space begins at:
0x30000000 for slot 0
0x40000000 for slot 1
0x50000000 for slot 2
0x60000000 for slot 3
All offsets given below are relative to the beginning of the daughter card address space (shown above).
Table 1. Daughter Card Address Map
OFFSET
0X0000
to
0X0015
0X1000
to
0X10ff
0X1100
to
0X11ff
0X1200
to
0X12ff
0X1300
to
0X13ff
DEVICE
FPGA
T1/E1/J1
Transceiver #1
T1/E1/J1
Transceiver #2
T1/E1/J1
Transceiver #3
T1/E1/J1
Transceiver #4
DESCRIPTION
Board identification and clock/signal routing
DS21458 T1/E1/J1 transceiver, port 1
DS21458 T1/E1/J1 transceiver, port 2
DS21458 T1/E1/J1 transceiver, port 3
DS21458 T1/E1/J1 transceiver, port 4
Registers in the FPGA can be easily modified using the ChipView host-based user-interface software along with
the definition file named “DS21458DC_FPGA.def.”
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